RAM memory is one of the essential components of our computer, however, it has had a boring evolution in recent years since the appearance of DDR memory back in 2000, since then we have seen up to four generations of this memory and we have a fifth around the corner. But what will the RAM of the future look like and what changes will it have?
We are used to RAM memory evolving every x years in the form of a new generation of DDR, GDDR memory or whatever the type of memory used at any given time, but this could change since the use of certain technologies will be necessary in order to that it continues to evolve.
How has RAM scaled in all this time?
The RAM being a semiconductor evolves following Moore’s Law and at the same time the Dennard scale, this means that on the one hand the density of the transistors increases and with it the memory storage capacity, while on the other the speed of communication is improved, what we call the bandwidth.
The idea is very simple, in each new manufacturing node the voltage necessary to achieve a specific clock speed decreases, so we can create a RAM that consumes the same and is faster or another that is just as fast but consumes a lot less.
But the problem comes with the increase in speed, since the bandwidth of the RAM of a system depends on the energy consumption of the communication between the memory and the processor to which it is assigned, so the amount of width of band with each new node is limited and it is happening in that the jumps from one type of DDR memory to another are getting smaller and smaller.
What if we can’t scale the system RAM further in the future?
With each new manufacturing node, used to make both memories and processors, we find that the jumps in clock speed are getting smaller and smaller. This for the moment affects only the processors, but the memories will not take long to affect them and it will reach the point where a generational jump will be less than expected, not to say almost zero.
A solution for this is to use technologies such as the PAM-4 used in the GDDR6X and future iterations of the PCI Express standard, if we look at it from a certain point of view, PAM-4 is still a type of data compression. What’s more, it is said that future DDR6 memory could use PAM-4 communication.
And speaking of data compression, it is very possible that we see RAM memories with logic inside, accelerators designed to make the search for data more efficient and faster, that can compress and decompress the data the flight that is sent. The reason for doing this is very simple, sending x bytes that are compressed data consumes energy the same as sending the same number of bytes with uncompressed data.
Are we going to see 3D DRAM memory as RAM of the future?
3D DRAM consists of stacking multiple memory chips and using pathways through silicon to communicate with the memory controller.
In the case of DDR memories, there are 3DS-DDR standards in which up to 4 DDRn chips are stacked (the nth generation of DDR) that are connected to a 64-bit controller. So with this technology it would be possible to reduce a total 8-chip DIMM to two chips only. But it does not provide any advantage in consumption and speed, but it does result in extremely expensive memory, which has led to its use not being standardized and we continue with conventional memory DIMMs.
3D DRAM only makes sense if it is accompanied by interfaces with a large number of pins, which can transmit a large number of bits per cycle, making it possible to use lower clock speeds and thus a lower voltage, but these solutions require a complex interposer and greatly limit the expansion capabilities of RAM.