For some time now, Intel has developed and improved a technology that does not normally have a direct approach by the press to each new generation of processors that is released and that, however, is really important to explain. We are talking about the so-called DMI, which is gaining vital importance as platforms approach the maximum speeds of the interfaces. What exactly is it and why is it moving so slowly in time?
With the arrival of the 9 series processors back in 2004, Intel wanted to go a step further in transmitting different interfaces with the CPU. In the old days, a northbridge and southbridge were always needed for full communication of any component with the CPU, so eliminating one of them was an important step to unify criteria and reduce latencies, as well as to simplify future architectures. Hence, DMI was born, which is still in force today.
A long-term strategy that continues to bear fruit today
With the birth of the new “Core” processors as such and with the i7 990X as a key part of them, Intel managed to literally destroy AMD in CPU. Part of the blame for the dominance that the blues imposed on the reds comes precisely from the DMI or Direct Media Interface for its acronym in English, and it is nothing more than the link between the processor and its complementary chip, which is usually the so-called PCH .
DMI as such is a data bus that on certain occasions and for other buses is developed as an interface, also as a high-speed point-to-point link between two chips. Do not confuse DMI with QPI, because they are not the same, which is important when talking about the second.
DMI debuted as we have said in 2004 hand in hand with the PCH ICH6 for the ix CPUs of the 900 series, this being the so-called DMI 1.0 , which did not change practically anything until the arrival of the second, much improved version.
DMI versions
As we say, DMI 1.0 as such has been in force from 2004 to 2011. The peculiarity of this first version is that it supported both Northbridge and Southbridge, where yes, Intel clearly marked the compatibility and functionality of the interface in each case.
This first DMI 1.0 achieved a maximum and only in some specific cases a speed of 1 GB / s bidirectional, with the peculiarity that it could be exercised on up to 4 links at the same time, so we had 4 GB / s bidirectional in real time .
This version was not touched by Intel until the arrival of DMI 2.0, so it was adapted to each platform in different configurations. But in 2011 and with the so-called new version 2.0, Intel doubled the transfer speed to 2 GB / s with the same available lines and also ended with the Southbridge as such, and in a way with the Northbridge, leaving a single chip which was now known as PCH or Platform Controller Hub , which did all the functions of both, while others were assumed by the CPU.
Included in this new release is a little-known enhancement such as the Advanced Priority Service for Recurring Traffic with Isochronous Transfers. This is an enhancement that was intended to maximize QPI performance in multi-socket environments and within mainstream platforms to give the I / O subsystem by removing northbridge and southbridge sufficient bandwidth available to achieve maximum performance in interfaces such as PCIE, SATAs, new generation USB etc.
Last and most current that accompanies us so far, we have the DMI 3.0 version, which arrived in 2015 with the Broadwell architecture, which in turn was based on Skylake. The determining TCPs were those of the 100 series, where it was already allowed to use links with transfers of up to 8 GT / s for the four lines and also the speed with the TCP was increased to almost 4 GB / s as a direct link.