Intel 4, the node that increases the speed of the chips by 20%

The results are truly impressive for a single node jump and evidence that Intel has been competing at real inferiority for many years due to delays in its 10nm node, now called Intel 7. For its part, Intel 4 is a leap forward. quite interesting, that calls the bet (late, yes) and that gradually puts the company at the forefront again.

Five nodes in 4 years, the bet starts with Intel 4

Intel 7 was brought to market more because of the investment the company made and the fact that investors had their eye on it than because of actual performance. It is true that it has been a leap forward, but at a huge price in every way. The solution, first of all at least, is Intel 4 and… It’s very promising.

The improvements are very interesting and rarely can we say numbers like these:

• First generation EUV lithograph .
• Frequency jump at the same power of 21.5% .
• At the same frequency the power is reduced by 40% .
• 2X area scaling improvement.

All this against the current Intel 7 lithographic process, which was the densest comparatively speaking against its predecessor… Until now. Breaking down point by point we will better understand what has been exposed.

First of all, EUV lithography has been achieved thanks to ASML scanners, which it has taken Intel almost two years to build up in volume to generate enough wafers per hour to have enough chips secured. It consists of a fairly high number of layers, 18 in total , which is shocking considering that Intel 7 has 17 of them. This is something that we will also see with Intel 3 in the same direction, but at the moment there is no data.

The frequency jump is the most interesting, since neither TSMC nor Samsung with EUV have achieved similar values and if we extrapolate it to the current Core 12, we would have frequencies of 6.6 GHz in the future Core 14, crazy figures that we do not know not even if they are feasible and compatible in these terms with the architecture, where in any case there will be an increase without a doubt.

If Intel opts for efficiency, the result can be a hit at the low end

And it is that Intel normally creates two libraries for each node: one of high density and another of high performance. In the case of Intel 4 this is going to result in a bit of a turn of events, since the libraries for high density are apparently not available on this node, so only high performance remains as such.

That said, within high performance we can find, technically speaking, two approaches named above: expose the maximum available frequency, expose the node to its maximum efficiency. If Intel opts for both approaches by segmenting the range, we could find ourselves with fast processors and, above all, very energy efficient, which would be very interesting for low-cost gaming laptops and work computers, because if at 5.5 GHz they manage to drop 40% consumption we would talk about a Core i9-12900KS with just 125 watts in full, figures now unthinkable.

Intel 4 Specifications

	Intel 4	Intel 7	TSMC-N5	TSMC N3
HP Library Density	160MTr/mm^2 (est.)	80MTr/mm^2	130MTr/mm^2 (est.)	208 MTr/mm^2 (est.)
HD Library Density	None Planned	100MTr/mm^2	167 MTr/mm^2 (est.)	267 MTr/mm^2 (est.)
Logic Density	2x	2.7x	1.83x	1.6x
Perf (iso power)	1.2X	1.15x	1.15x	1.11x

Area scaling improvement is the technical computation of all that has been said. And it is that the HP (High Power) library currently shows a density of 160 MT/mm2 (it could still be improved in a few million transistors, but not much), where the density increases up to 2X if we take into account that Intel 7 was at 80 MT/mm2, with an iso yield of 1.2X .

Its direct rival is the TSMC N5 and to a lesser extent the Samsung N3 already with GAA