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The fetch-decode-execute cycle is a simple way to explain how a CPU carries out a program. It gets an instruction, works out what that instruction asks for, and performs the operation. Saving the result is often shown as a separate write-back step.
This is a teaching model. Real processors can overlap stages, handle several instructions at once, and use more stages than the three shown here. An instruction cycle is also not the same thing as one clock tick.
The instruction cycle at a glance
| Stage | What happens | Simple example |
|---|---|---|
| Fetch | The CPU obtains the next instruction from the memory system, often through its instruction cache | Get an instruction that adds two registers |
| Decode | Decode logic identifies the operation, inputs, and destination | Recognize ADD and which registers it uses |
| Execute | The appropriate unit carries out the operation | The arithmetic unit adds the values |
| Write-back or result handling | The result goes to its destination; some instructions instead store data or change program flow | Put the sum in a destination register |
1. Fetch: get the next instruction
The program counter, often called the instruction pointer on x86, helps track the instruction address. Fetch hardware requests the instruction bytes from the memory system. If the needed bytes are already in a suitable cache, the CPU does not have to fetch them directly from main RAM each time.
The address of the next instruction depends on the instruction set and the program’s flow. It does not always increase by one. Instruction lengths can differ, and a branch or jump can send execution to another address.
2. Decode: work out what to do
This answers a common question: where is a computer instruction decoded? In the CPU’s instruction-decode and control logic. The opcode identifies the kind of operation; other encoded fields can identify registers, constants, or addressing information.
For a simple addition, the CPU needs the input values and a destination. Other instructions may load data, compare values, or change which instruction comes next. Some processors translate an instruction into smaller internal operations before execution.
3. Execute: carry out the operation
The third stage does the requested work. An arithmetic logic unit may add or compare values, a floating-point unit may handle suitable number operations, and load/store hardware deals with data-memory access. The exact units and steps depend on the processor.
Do not assume every result goes straight to RAM. Many instructions work on registers inside the CPU. The RISC-V base instruction-set specification, for example, separates register arithmetic from the load and store instructions that access memory.
A small fetch-decode-execute example
Imagine a simplified program that adds 5 to a number stored in memory:
- Load: fetch and decode a load instruction, then read the number into a register.
- Add: fetch and decode an addition instruction, then add 5 and keep the result in a register.
- Store: fetch and decode a store instruction, then write the result to the chosen memory location.
This example shows why one task can require several instructions, and why not every instruction performs every kind of memory access.
Why modern CPUs do more than one step at a time
A pipeline overlaps work: one instruction can be decoded while another is fetched and an earlier one executes. Superscalar processors can start multiple operations, while out-of-order execution can rearrange suitable work without changing the program’s required results.
Cache misses, data dependencies, and branch mistakes can slow progress. Clock speed alone therefore does not tell you how fast a whole application will run. For a practical look at gaming behavior, use our Afterburner and RivaTuner monitoring guide. To identify your processor first, see how to open Windows system information.