We have spoken sideways on several occasions about the new revolution that all the major semiconductor companies will have to face, as well as the current foundries. It is none other than the paradigm shift, once again, in today’s transistors. FinFET has been showing signs of exhaustion for two generations and Samsung has already taken the first step to position itself as a leader in this field with its MBCFET technology and its 3nm , what improvements will it bring?
It’s funny how a decision-making about a strategy can mark the global market. Both TSMC, Intel and Samsung are going to fight again for the best lithographic process of today and the nearest future with 3 nm and 5 nm respectively. But beyond the density, the way to go to reduce the size of the transistors will bring a queue with their implementation.
Samsung MBCFET, its 3nm will bring new generation GAA transistors
FinFET is a super exploited technology with an expiration date. The big three know it and Samsung is the first to have a new generation technology available that promises benefits that are really hard to believe today.
This technology is included within what Samsung has presented as Multi-Bridge Channel FET or MBCFET and will integrate as its main novelty the new Gate-All-Around transistors or also known as GAA .
These new transistors are formed as a nanoscale and are known in their stacking as Nanosheet or Nanoblades for the way in which these components are allowed to scale, partially replacing traditional fins. The stacking is in vertical form, said Nanosheet being in horizontal format, like the folios in a printer package.
This system achieves a higher current per battery and allows to overcome the current problems that FinFET contains and its height, something that TSMC and Intel have momentarily overcome but that have the hours counted for obvious reasons.
Advantages of Samsung MBCFET technology
Samsung lists three advantages in terms of architecture and with it three advantages in terms of technology. The first is that MBCFET does not require an additional area with its Nanosheet to improve speeds, since they can be vertically stacked instead of adding more fins as current FinFET technology does.
The second advantage is that Samsung was based on current FinFET traditional design processes for its creation. This has a very clear advantage for designers, as they can replace FinFET designs with MBCFET without changing footprints.
Finally and in relation to this second advantage, MBCFET is compatible (and in fact shares) the same manufacturing process tools and methodology as FinFET, so the cost to your industry is minimal and implementation will be very fast. The question then, given its characteristics, is simple, what does all these improvements amount to if we compare FinFET vs MBCFET?
At the same lithographic process (3 nm in this case) Samsung has provided very clear figures for improvement for MBCFET: -50% energy consumption, + 30% performance improvement and -45% area reduction . Very strong figures that will undoubtedly mark a before and after in the chips that implement it, just as happened with FinFET at the time.
In principle, this technology will begin to be mass-produced for the company’s 3nm starting in 2021, where 2022 will be the time it hits the market and where both TSMC and Intel will have to compete against it.
The first will do it with 3nm based on FinFET, while Intel is an unknown with its 5nm EUV. It will be interesting to see who takes the cat to the water in a fight not for the density and performance of the node, but for the reduction of the area and the energy consumption as such.